Highly reliable rectifier unit



F. G. STEELE HIGHLY RELIABLE RECTIFIER UNIT leff Original Filed Aug. 6,1956 Dec. 18, 1962 Dec. 18, 1962 F. cs. STEELE 3,069,552

HIGHLY RELIABLE RECTIFIER UNIT Oginal Filed Aug. 6, 1956 2 Sheets-Sheet2 United States Patent Olice 3,669,562 Patented Dec. 1S, 1962 13,069,562 HlGHLY RELIABLE RECTlER UNET Floyd G. Steele, La Jolla,Calif., assigner to ligital Control Systems, lne., La della, Calif.

@riginal application Aug. 6, 1956, Ser. No. @2,267, now Patent No.2,910,584, dated Oct. 27, 1959. Divided and this application Aug. 24,1959, Ser. No. 835,7l1

ll Claims. (U. Sill-@255) The present invention relates to circuits forincreasing the reliability of components for electronic digitalcornputer or switching machines and more particularly to a diode quadunit having a reliability of operation far exceeding the reliability ofa single diode. This is a divisional application of the copendingapplication of Floyd G. Steele, Serial No. 602,207, filed August 6,1956, for a Voted-Output 1lip-lilop Unit which matured into U.S. PatentNo. 2,910,584 on October 27, 1959.

Electronic digital computing or switching machines, as they are commonlyconstructed, comprise numbers of circuits ordinarily connected togethersuch that the failure of any individual circuit will cause a malfunctionof the total machine by producing a result that is, in fact, erroneous.ln the parent application, a voted-output ilip unit was disclosed havingthree independently operable ip-ilops and a logical voting circuit whichprovided an output signal representing the state of the majority ofthem. Each of the llip-ilops received the same input signals and theunit functioned with a reliability of operation vastly greater than thereliability of a single tlip-llop. Further, catastrophic failure of asingle flip-dop introduced no logical errors in the operation.

Although voting circuits add greatly to the reliability of such activeelement circuits such as dip-flops, there are applications in which suchextremely high reliability is required, that the` additional diodes inthe voting circuits might detract from the ultimate reliability of thesystem. Therefore, it is desirable to construct the voting circuits andother gating circuits, so that they are virtually independent of diodefailures.

According to the present invention, diodes are connected in a quad coniuration to provide a quad diode unit which has an expected lifetime farin excess of that of an individual diode, and yet is a direct functionalreplacement for an individual diode. Either a quad of two seriesconnected diodes in parallel, or alternatively, two parallel connecteddiodes in series with another pair of parallel connected diodes may beused. The choice of the particular quad conliguration depends to a greatextent upon whether, in the particular' applica-tion, the failures ofthe individual diodes being replaced are primarily open circuits orshort circuits.

it will be readily understood that if an individual diode in a gate isreplaced by a more reliable, substitute component, such as a diode quad,the operational behavior of the substitute will be indistinguishablefrom the diode it replaces. As must be obvious, the voltages andcurrents which are applied to individual diodes or other computingcircuit components during normal operation, doY not exceed the ratedoperating limits of these components. ln logical gating circuits,therefore, the problem of reliability that arises is not one of diodefailure due to voltage or current overload, but rather diode failure dueto aging and deterioration even though the diode has been operatedwithin the recommended limits. When each individual diode of a gate isreplaced by a diode quad, this condition, as to applied voltage andcurrent of course continues to obtain. The voltages and currents appliedto the diode quad are therefore well within the operating limits of asingle diode. Under these conditions, it is obvious that not only willthe failure of a single diode not overload the remaining diodes of thequad, but, more important, single diode failures will in no way disturbthe operation of the quad. Rather, multiple diode failures in a singlequad are required before the quad malfunctions.

lt is therefore an object of the present invention to provide a dioderectier unit which is several orders of magnitude more reliable thanconventional diode rectiiiers.

It is an additional object of the invention to replace individual diodeswith diode quads for greatly increasing the reliability of gatingcircuits.

The novel features which are believed to be characteristic of theinvention both as to its organization and method of operation, togetherwith further objects and advantages thereof, will be better understoodfrom the following description considered in connection with theecompanying drawings in which several embodiments of the invention areillustrated by waypof example. It is to be expressly understood,however, that the drawings are for the purpose of illustration anddescription only, and are not intended as a definition of the limits ofthe invention.

FIGURE l is a partly block, partly circuit diagram of a voted-outputflip-liep unit according to the invention of the parent application.

FIGURE 2 is a circuit diagram of a highly reliable diode rectier unitaccording to the present invention.

FIGURE 3 is a circuit diagram of an alternative highly reliable dioderectifier unit.

FIGURE 4 is a circuit diagram of a voting circuit using the highlyreliable rectifier units of FIGURES 2 and 3.

Referring now to the drawings wherein like parts are similarlydesignated throughout the several views there is shown in FIGURE 1 inaccordance with the invention of the parent application a partly block,partly circuit diagram of a highly reliable voted-output dip-flop unitdesignated flip-liep unit A which is operable for changing its stablestate in response to input signals applied to input conductors ll and.l2 and for producing a bivalued voted-output signal a (and also acomplementary signal a) whose value is representative of the stablestate of the dip-flop unit. As shown in FIGURE l, flip-flop unit Aincludes three conventional flip-flop circuits designated A1, A2 and A3respectively, each flip-flop circuit being independently settable eitherto a first state (designated the l state) or a second internal state(designated the 0 state) in response to application of input signalsthereto; and producing corresponding bivalued output signals designatedal, a2 and a3 respectively (and also corresponding complementary signalsa1', a2 and a3) whose values are representative of the states of thecorresponding `flip-flop circuits.

Flip-dop unit A. also includes conductors i3 and it interconnecting theinput conductors lll and l2 and the inputs of flip-flop circuits A1 andA3, conductors il and i3 being directly connected to flip-flop circuitA2 so that each input signal is applied to all three of the flip-flopcircuits in such manner as to set all three of the flip-dop circuits tothe same state. The flip-flop unit further includes voting circuit lewhich receives bivalued output signals a1, a2 and a3 produced by 'thethree flip-flop circuits and combines these output signals to produce abivalued voted-output signal, designated a, whose value isrepresentative of like states of any two of the flip-flop circuits.

Thus, for example, if the states of flip-flop circuits A1 and A2 (or ofA1 and A3, or of A2 and A3) are the same (both l or both 0) then thevalue of voted-output 'signal a produced by voting circuit i6 will besuch as to represent the common state of these two flip-flop circuits.Thus signal a may have, as will be described, a high voltage level torepresent a common 1 state of the two agreeing 3 flip-Hop circuits and alow voltage level to represent a common state of the two agreeinghip-flop circuits or may represent the l and O states in other ways, aswill be appreciated by those skilled in the art.

As shown in FIGURE l, complementary signals al', a2 and a3 are applied.to a second voting circuit 16 which combines these signals in similarmanner to produce the voted-output signal a which is complementary tosignal a. Since the two voting circuits shown in FIG- URE l may beidentical in struct-ure, oper tion, the operation 'of .the votingcircuit will be descri only in connection with the formation of signala.

it will be recognized in View of the foregoing explanation tha-t if allthree lip-fiop circuits A1, A2 and A2 are operating properly, theirstates will be identical and, therefore, the value of voted-outputsignal a produced by voting circuit i6 will represent the common stateof the three Ihip-flop circuits. Suppose however that one of theilip-flop circuits fails so that it is in an incorrect state at aparticular time and therefore produces an erroneously valued outputsignal. Since the {tip-flop circuits operate independently or" eachother the remaining two ilip-iiop circuits, in response to the inputsignals, will be set to a common correct state and wilt producecorrectly valued output signals. Voting circuit i6 in respense to theseoutput signals will therefore produce a voted-output signal representingthe common or like state or" the two correct `flip-ilop circuits.

It is thus seen that failure of one of the three ilip-ilop circuits doesnot impair the operation of the iiip-op unit of the present inventionand that actually at least two of the ip-op circuits must failsimultaneously before the hip-flop unit can produce an erroneous outputsignal. As explained hereinbefore because of this mode of operation thereliability of the `flop-nop unit of the present invention is severalorders of magnitude greater than the reliability of an individualip-ilop circuit.

Referring again to FlGURE l, it will be assumed for purposes ofexplanation that ilip-iiop circuits A1, A2 and A3 are conventionalEccles-Jordan type trigger circuits each of which has a set (S) inputand a Zero (Z) input each flip-flop being settable to a irst (l) stateor a second (0) state in response to signals selectively applied to itsset (S) and zero (Z) inputs respectively, and operable for reversingstate when signals are simultaneously applied to both of its inputs. Theiiip-ftop circuit produces a rst output signal which has a high voltagelevel when the flip-flop circuit is in its l state and a low voltagelevel when the flip-hop circuit is in its O state, and a second outputsignal complementary to the lirst having low and high voltage levels,respeotivel", when the iipop circuit is in its l and 0 states.

Conductor 11 is connected, either directly or through conductor 13, tothe set (S) inputs of each of the flipflop circuits and conductor 12 isconnected, either directly or .through conductor 14, to the zero (Z)inputs of each of the flip-flop circuits. Thus, it is clear thatapplication of an input `signai to input conductor lli will have theelect of causing all .three ilip-lop circuits (if they are all operatingproperly) to be set to their l sta-tes while application of an inputsignal to conductor l2. will have the eiect or" setting all three of thedip-flop circuits -to their 0 states. Simultaneous application of inputsignals to conductors l1 and l2 will cause all three of the ip-opcircuits to reverse state. Output signals a1, a2 and a3 respectivelyproduced by :dip-flop A1, A2 and An will (for the assumed type ofnip-nop circuit) have high voltage levels when the correspondingflipflop circuits are in the l state and low levels when thecorresponding ip-op circuits are in the 0 state and signals al', a2' anda2 have voltage levels complementary thereto.

As shown in FIGURE l, signals al, a2 and a3 are received by votingcircuit 16 and combined thereby to produce voted-output signal a whosevoltage level is determined by agreernent between the voltage levels ofany two of signals al, a2 and c3. Thus if any pair of signals (al `anda2, or al and a3, or a2 and (.12) have the same voltage levels, signal awill have a vcitage level agreeing with the like-valued pair.

Voting circuit i6 includes three logical gates 30a, Sill) and Stic, eachreceiving a different pair of the signals a1, a2, :z3 `and producingcorresponding resultant bivalucd signals in accordance with apredetermined logical gating operation. Voting circuit ld also includinga fourth logical gating circuit 31 coupled to each of the logical gates30a, 3617 and 39cfor combining the resultant signal produced thereby inaccordance with a second logical gating operation to produce thebivalued voted-output signal.

In the specific embodiment of voting circuit i6 shown in FIGURE l, gatesSita, tc are conventional logical and gates receiving the pairs ofsignals nl and a2, a1 and a3, a2 and a3, respectively, and combiningthese signals to produce corresponding resultant signals (5.11612),(a1a3) and (c2a3) in accordance with `the logical and operations; andgate 31 is a logical or gate which receives these resultant signals andcombines them to produce voted-output signal a. A logical and gate as iswellkncwn to those skilled in the art produces a high level outputsignal only if .all the input signals applied thereto are high andotherwise produces a low level signal while a logical or gate producersa high level signal if any of the input signals applied thereto is high.Thus and" gate 3th: shown in FIGURE l produces the resultant signal(a1a2) having -a high level only when signals al and a2 are both high,gates 3% and 30e operating similarly in producing ythe resultant signals(ala) and M2413); while or gate 31 is operable for combining these threeresultant signals to produce voted-output signal a having a high levelonly when any of the signals (a1a2) or (altra) or (a2a3) is high.

And gate Stia comprises two diode rcctiiiers D1a land D2, to whosecathodes the signals al and a2 are respectively applied, the anodes ofthese rectiers being connected in common to a lower terminal Stia o' aresistor whose upper terminal is connected to a source of relativelyhigh voltage V1. in .the operation of and gate Stia if signal al orsignal a2 is low, the associated diode Dm or 132 will be stronglyforward biased so that it remains strongly conductive therebyeffectively establishing a short circuit between the source of signal alor a2 and terminal 59a. Thus the signal at terminal 59a (signal a1a2)will remain low if either signal al or a2 is low and will go high onlywhen al and a2 are both high.

And gates 30h and Stic are similarly constructed utilizing dioderectifiers Dlb, B2b, DIC, D20, respectively. As further shown in FIGUREl, or gate 3l comprises three diode rectiiiers D1, D2 and D3 whosecathodes are connected in common to upper terminal Sil of a resistorwhose lower terminal is connected to a source of relatively low voltageV2, the signals (a1a2), (c1113) and (a2a3) being applied respectively tothe cathodes of rectiers D1, D2 and D3. lf any of these signals has ahigh voltage level, the associated diode rectifier will be forwardbiased (conductively biased) so that the low voltage level will beimpressed upon terminal 50. rIhus signal a at terminal Si) Will normallybe low (because of the eflfect of the low voltage V2) and will be highonly if one of signals (a1a2) or (a1a3) or (a2a3) is high.

Although relatively high reliability can be obtained by using the votingcircuit presented above without modiication, there are however someapplications in which such extremely high reliability is required thatit is desirable to construct the voting circuits, or other gatingcircuits, so that they are still further independent of short circuitingor open circuiting of diodes. In such applications, it is desirable toreplace the individual diode rectiers utilized with four element dioderectifier units of the type shown in FIGURES 2 and 3 below.

In FIGURE 2, there is shown a diode rectifier unit D which comprisesfour individual diode rectifiers d1, d2, d3 and d., and is operable forconducting current unidirectionally from an input terminaly 61 to anoutput terminal 62. Diode d1 has its anode connected to input terminal61 and its cathode connected to the anode of diode d2 which has itscathode connected to output terminal 62. Diode d3 also has its anodeconnected to input terminal 61 and its cathode connected to the anode ofdiode d4 which has its cathode connected to output terminal 62.Rectifier unit D thus includes two branches, one branch being a seriesconnection of the diodes d, and d2 between the input and outputterminals and the other branch being a series connection of diodes d3and d4 between the input and output terminals. It is clear from aconsideration of FIGURE 2 that before rectifier unit D can fail, theremust be an opening of two diodes in unlike branches or a shorting of twodiodes in the saine branch. Thus, it is apparent that the reliability ofrectifier unit D is far higher than the reliability of an individualdiode rectifier and therefore by substituting diode unit D for eachindividual diode rectifier of voting circuit I6, enormously highreliability of operation may be obtained.

A modified form of rectifier unit D is shon in FIGURE 3 in which thecathodes of diodes d1 and d3 (and hence the anodes of diodes d2 and d4)have been connected t0- gether. In operation this form of rectifier unitD differs from that shown in FIGURE 2 in that it is more independent ofopen circuits while being less independent of short circuits. Forexample, if in FIGURE 3, diode d1 were open-circuited, onlyopen-circuiting of d3 (alone) can stop operation; while in FIGURE 2, ifd1 were opencircuited, open-cireuiting of either d3 or d4 would stopoperation of the unit.

-In the same way, referring again to FIGURE 3, if d1 were shorted,shorting of either d2 or d4 would stop operation, while in FIGURE 2, ifd1 were shorted, only shorting of d2 (alone) would stop correctoperation of the unit. It is thus clear that choice for a particularapplication between the embodiments of FIGURES 2 and 3 would bedetermined by analysis of the relative probabilities of open-circuitingor short-circuiting of diodes.

Turning now to FIGURE 4, for purposes of illustration, the votingcircuit 16 of FIGURE 1 has been redrawn as circuit i6" in which diodequads, such as shown in FIGURES 2 and 3 have been substituted for theindividual gating diodes of FIGURE 1. It may be seen, for example, thatdiode Dm of the and gate 30a has been replaced here by a typical diodequad D1a of FIGURE 3. Diode D2a has been replaced by a diode quad D2asuch as shown in FIGURE 2.

Although the diode quads of FIGURES 2 and 3 are not identical, they arevirtually interchangeable unless the particular diode for which a quadis being substituted is more prone to failure in a particular manner,such as an open circuit or a short circuit. If open circuits are moreprevalent, then it is preferable to use the diode quad of FIGURE 3. Onthe other hand, if short circuits are more frequently encountered, thenthe quad of FIGURE 2 would provide greater reliability.

As may be seen from an inspection of FIGURE 4, each gating diode of thevoting circuit I6 of FIGURE l has ben replaced by a more reliable diodequad. The circuit operation, as set forth above, is otherwise unchanged.

vIt will be obvious that the probability of catastrophic failure of adiode quad is smaller by several orders of magnitude than the failure ofan individual diode and it will be appreciated that it is necessary tohave simultaneous catastrophic failures in several of the quads before 6errors Will be introduced. It is therefore clear that extremes ofreliability may easily be achieved by the simple expedient ofsubstituting diode quads for diodes thereby assuring greatly increasedlongevity of circuits with greater confidence.

What is claimed as new is:

1. In logical diode gating circuits for use with iiip-fiop circuits inelectronic digital computing and switching machines, a highly reliablerectier unit for passing bivalued signals representing informationunidirectionally from an input terminal to an output terminal, saidrectifier unit comprising: first, second, third and fourth dioderectifiers each having an anode and a cathode; said first dioderectifier having its anode conductively connected to the input terminaland having its cathode conductively connected to the anode of saidsecond diode rectifier; said third diode rectifier having its anodeconductively connected to s'aid input terminal and its cathode connectedto the anode of said fourth diode rectifier; and said second and fourthdiode rectifiers having their cathodes conductively connected to saidoutput terminal; the signals being limited in voltage and current tomagnitudes less than the least rated voltage and current of any of saiddiode rectifiers whereby short-circuiting or opencircuiting of any oneof the diode rectifiers does not impair tlie operation of the rectifierunit.

2. In logical diode gating circuits for use with fiip-iiop circuits inelectronic digital computing and switching machines, a highly reliablerectifier unit for passing current signals representing informationunidirectionally from an input terminal to an output terminal, saidrectifier unit comprising: a first, second, third and fourth dioderectifier each having a cathode and an anode, said first and third dioderectifiers having their anodes conductively connected to said inputterminal; said second and fourth diode rectifiers having their cathodesconductively connected to said output terminals; and means forconductively connecting the cathodes of said first and third dioderectifiers to the anodes of said second and fourth diode rectifiers, thecurrent signals being limited to magnitudes less than the least ratedcurrent of any of said diode rectifiers.

3. In a logical diode gating circuit for use with flip-liep circuits inelectronic digital computing and switching machines, the combinationcomprising: a highly reliable rectifier unit for unidirectionallyconducting bivalued signals representing information from an inputterminal to an output terminal, said rectifier unit including first,

second, third and fourth diode rectifiers each having an anode and acathode; said first and third diode rectifiers having their anodescommonly connected to one of the terminals and having their cathodesconnected respectively to the anodes of said second and fourth dioderectifiers; said second and fourth diode rectifiers having theircathodes commonly connected to the other of the terminals; means forapplying a potential to at least one of the terminals, said potentialbeing limited in magnitude to the least rated voltage of any of saiddiode rectifiers; and means for limiting the current fiow through saidrectifier unit to a magnitude less than the least rated current of anyof said diode rectifiers; whereby operation of said rectifier unit isunimpaired by failure of any of said diode rectifiers.

4. In a logical diode gating circuit for use with fiip-flop circuits inelectronic digital computing and switching machines, the combinationcomprising: a highly reliable rectifier unit for unidirectionallyconducting bivalued signals representing information from an inputterminal to an output terminal, said rectifier unit including first,second, third and fourth diode rectifiers each having a cathode and ananode; said first and third diode rectiers having their anodes commonlyconnected to one of the terminals; said second and fourth dioderectifiers having their cathodes commonly connected to the other of theterminals; means for connecting the cathodes of said first and thirddiode rectifiers to the anodes of said second and fourth diode rectiers;means for applying a potential to at least one of the terminals, saidpotential being limited in magnitude to the least rated voltage of anyof said diode rectifiers; and means for limiting the current flowthrough said rectifier unit to a magnitude less than the least ratedcurrent of any of said diode rectifier-s; whereby operation of saidrectifier unit is unimpaired by failure of any of said diode rectifiers5. A highly reliable logical diode gating circuit for use in electronicdigital computing and switching machines comprising: a first and seconddiode rectifier quad units each having input and output terminals andincluding first, second, third and fourth diode rectifiers each havingan anode and a cathode, said first and third diodes having their anodescommonly connected to one of said terminals and their cathodesrespectively connected to said second and fourth diode anodes, and saidsecond and fourth diodes having their cathodes commonly connected to theother of said terminals; means adapted to connect said first quad unitinput terminal to a first source of bivalued signals representinginformation; means adapted to conect said second quad unit inputterminal to a second source of bivalued signals representinginformation; and means including an output junction commonly connectedto said output terminals for applying a bias to said rectifier diodequad units; whereby signals appearing at said output junction have a rstvalue in response to application of first value signals at both inputterminals, and

have a second value in response to application of second 2Y valuesignals at both input terminals, and whereby operation of said gatingcircuit is independent of the failure of a single diode in a diode quadunit.

6. The gating circuit of claim 5, further including means commonlyconnecting said first and third diode cathodes.

7. The gating circuit of claim 5 wherein said first and third diodeanodes are connected to said input terminals.

8. The gating circuit of claim 5 wherein said first and third diodeanodes are connected to said output terminals.

9. The gating circuit of claim 5 wherein application of first valuesignals at either of said input terminals results in a first valuesignal at said output junction.

10. In logical diode gating circuits for use with ipflop circuits inelectronic digital computing and switching machines, a highly reliablerectifier unit for passing current signals representing informationunidirectionally from an input terminal to an output terminal, saidrectifier unit comprising: a first, second, third and fourth dioderectifier each having a cathode and an anode, said first and third dioderectifiers having their anodes conductively connected to said inputterminal; said second and fourth diode rectifiers having their cathodesconductively connected to said output terminals; and means forconductively connecting the cathodes of said first and third dioderectifiers to the anodes of said second and fourth diode rectiers, saidmeans including conductive means for commonly connecting the cathodes ofsaid first and third diode rectiers, the current signals being limitedto magnitudes less than the least rated current of any of said dioderectifiers.

l1. In a logical diode gating circuit for use with flip-flop circuits inelectronic digital computing and switching machines, the combinationcomprising: a highly reliable rectifier unit for unidirectionallyconducting bivalued signals representing information from an inputterminal to an output terminal, said rectifier unit including first,second, third and fourth diode rectifiers each having an anode and acathode; said first and third diode rectitiers having their anodescommonly connected to one of the terminals and having their cathodesconnected respectively to the anodes of said second and fourth dioderectifiers; said second and fourth diode rectifiers having theircathodes commonly connected to the other of the terminals; conductivemeans for commonly connecting the cathodes of said first and third dioderectiers; means for applying a potential to at least one of the saidterminals, said potential being limited in magnitude to the least ratedvoltage of any of said diode rectifiers; and means for limiting thecurrent flow through said rectifier unit to a magnitude less than theleast rate current of any of said diode rectifiers; whereby operation ofsaid rectifier unit is unimpaired by failure of any of said dioderectifiers.

References Cited in the file of this patent UNITED STATES PATENTS1,959,513 Weyandt May 22, 1934 2,123,859 Winograd July 12, 19382,255,378 Colchester Sept. 9, 1941 2,444,458 Master July 6, 19482,803,703 Sherwin Aug. 20, 1957 2,813,243 Christian et al Nov. 12, 19572,874,331 Otto lFeb. 17, 1959 2,895,099 Dortort July 14, 1959 OTHERREFERENCES Proc. I.R.E., April 1956, vol. 44, No. 4, pages 509- 515,Increasing Reliability by the Use of Redundant Circuits, Creveling.

